INST_L=NONE, TRANS_TYPE=1C1A
SPI control
| TRANS_TYPE | Address and instruction transfer format 0 (1C1A): Command and address both in standard SPI frame format 1 (1C2A): Command in standard SPI format, address in format specified by FRF 2 (2C2A): Command and address both in format specified by FRF (e.g. Dual-SPI) |
| ADDR_L | Address length (0b-60b in 4b increments) |
| INST_L | Instruction length (0/4/8/16b) 0 (NONE): No instruction 1 (4B): 4-bit instruction 2 (8B): 8-bit instruction 3 (16B): 16-bit instruction |
| WAIT_CYCLES | Wait cycles between control frame transmit and data reception (in SCLK cycles) |
| SPI_DDR_EN | SPI DDR transfer enable |
| INST_DDR_EN | Instruction DDR transfer enable |
| SPI_RXDS_EN | Read data strobe enable |
| XIP_CMD | SPI Command to send in XIP mode (INST_L = 8-bit) or to append to Address (INST_L = 0-bit) |